Conventional semiconductor IC die utilize metal die pads for receiving and supplying signals to and from other circuitry. The die pad is usually in a rectangular shape, wherein some of the metal layers are utilized for carrying signals between the die pads and other circuitry of the IC chip. Conductive lines formed from one or more of the metal layers connect the die pads to nodes in the circuitry.
One method of die assembly utilizes solder bumped die that are flip chip assembled onto a workpiece. Flip chip interconnections provide short electrical connecting paths as compared to wire bonds, and therefore better electrical performance including speed. Conventional semiconductor die for flip chip applications have a single bump size including a single bump height and a single bump diameter that that are formed over die pads of a single fixed size.
The flip-chip die size in many IC design is limited by the size of the solder pads and the pad pitch, the number of input/output (I/O) pins, and the current density limitation of each solder pad. Uniform die pad size of the minimum pitch often necessitates multiple die pads for each high current (e.g., power supply terminal) terminal due to electromigration (EM) considerations, since a single minimum size die pad may fail the EM rule for high current terminals in some circuit designs. There is thus a bottleneck that limits the reduction of flip chip die size because of the solder pad design constraint.